A processor is a functional unit within a computer that interprets and executes instructions. In serial processors, instructions are processed sequentially, one at a time, even when the result or outcome of one instruction is independent of another instruction. In systems with parallel processors, performance is improved by processing unrelated instructions simultaneously within the same interval of time.
Parallel processing is often used in prior art systems that are customized to perform a small range of specific tasks, such as image processing or pattern matching. Since these types of functions require many small customized parallel processing elements, implementing them in fixed circuitry requires many parallel circuits.
Traditional parallel data processors execute simultaneously with a main processor instructions that are unrelated, that is, not dependent on the result of the other. Thus, the parallelism in such systems is at the processor level. In other words, within each processor, computations are still performed sequentially and by the processor. To perform computations in traditional memory/processor configurations, data must be brought from the memory to the processor. The processor then performs all the necessary computations and writes the results back to the memory. Traditional Parallel Processors have fixed circuitry and are not re-programmable at the circuitry level.
Field programmable gate arrays are Very Large Scale Integrated (VLSI) circuit chips having large numbers of user configurable circuit elements. Field programmable gate arrays allow users to change the connections between circuit elements and circuit configuration parameters at a hardware level in a matter of milliseconds.
The use of field programmable gate arrays to perform various computations is well known, as is the use of neural networks and various parallel CPU computer architectures. The present invention is not a replacement for field programmable gate arrays and neural networks, but is an architecture and methodology for using field programmable gate arrays in a manner that facilitates reconfiguration of the field programmable gate arrays and that makes the use of field programmable gate arrays in general purpose computer systems cost effective.
Definitions of the following terms used in this document are provided to assist the reader:
Compiler: A software program that translates a source program into an executable program.
Execute: To carry out (perform) an instruction or program.
Memory: (main storage) all of the addressable storage space in a processing unit and other internal storage that is used to execute instructions.
Millisecond: One thousandth of a second.
Operand: An entity on which an operation is performed.
Parallel: Pertaining to a process in which multiple events or computations occur within the same interval of time, each handled by a separate but similar functional unit.
Parallel processing: The concurrent or simultaneous execution of two or more processes in parallel computation units. Contrast with serial processing.
Processor: A functional unit that interprets and executes instructions; one or more integrated circuits that process instructions and perform a task.
Register: A part of internal storage having a specific storage capacity and intended for a specific purpose.
Serial processing: Pertaining to sequential or consecutive execution of two or more processes in a single device.